In the field of this invention, it is known for electronic devices and the like to require protection from high current stress, such as generated by ESD (ElectroStatic Discharge) events. Typically, sensitive circuits are provided with ESD protection components or circuitry whereby, in the event of an ESD event, the ESD protection components divert ESD current to, for example, a ground plane and away from the sensitive circuitry. However, there is typically a slight delay between the occurrence of an ESD event and the ESD protection components reacting, and diverting the ESD current away from the sensitive circuitry. During this delay, the sensitive circuitry is problematically exposed to a large current. Although the sensitive circuitry may only be exposed to the large current for a short period of time, it may be sufficient to damage some or all of the sensitive circuitry.
Switching elements, such as transistors, may be particularly prone to such large currents if such currents cause the switching elements to be switched to an ‘on’ state such that the currents are allowed to flow through them. In such a case, the excessive currents that flow through the switching elements before the ESD protection circuitry has time to react and divert the ESD currents away from the sensitive circuitry may destroy the switching elements. As a result, traditional ESD protection components are not sufficient for providing adequate protection to some sensitive circuits in which switching elements, such as transistors, are used and particularly may be susceptible to ESD currents.
A known method for preventing transistors and the like from switching to an ‘on’ state is to provide an ESD detection circuit which is separate from the traditional ESD protection circuitry, and arranged to detect an ESD event by, for example, detecting a high dV/dt event using, say, an RC time-constant and capacitive coupling. The ESD detection circuitry is arranged, upon detection of an ESD event, to hold the transistor in a deactivated state, for example using a switch or the like. A problem with the use of such an ESD detection circuit is that, not only does it require the RC time constant to be optimised for particular ESD events, but also, in the case of inductive loads being switched by the transistor, the ESD detection circuit can be triggered during normal operation and may lead to circuit oscillations.